PDMC 2012

11th International Workshop on Parallel and Distributed Methods in verifiCation

September 17th, 2012, Imperial College London, London, UK

Co-locating with
9th International Conference on Quantitative Evaluation of SysTems (QEST) 2012


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London

OBJECTIVES:

The growing importance of automated formal verification in the industry is driving a growing interest in aspects that directly impact its applicability to real world problems. One of the main technical challenges lies in devising tools and techniques that allow to handle very large industrial verification models.

At the same time, the computer industry is undergoing a major paradigm shift. Processor manufacturers are introducing new generations of multicore processor with large numbers of cores and high performance GPUs, cloud based computing resources are easily accessible, and external memory devices, such as hard disks or solid state disks, are getting more powerful.

It is inevitable that verification techniques and tools need to undergo a similarly deep technological transition to catch up with the new hardware architectures. This has created an increasing interest in parallelizing and distributing verification techniques.

The aim of the PDMC workshop series is to cover all aspects related to the verification and analysis of very large and complex systems using, in particular, methods and techniques that exploit current parallel hardware architectures. The PDMC workshop aims to provide a working forum for presenting, sharing, and discussing recent achievements in the field of high-performance verification.

TOPICS OF INTEREST:
Topics of interest include, but are not limited to:

  • parallel and/or distributed-memory techniques for verification
  • parallel SAT solving and its applications in verification
  • I/O efficient algorithms for verification
  • GPU accelerated algorithms for verification
  • platform dependent verification tools
  • industrial case studies employing PDMC techniques
  • applications of PDMC techniques to systems biology

INVITED SPEAKER:


PROCEEDINGS & SUBMISSION GUIDELINES:
We accept

  • regular papers (max. 15 pages in EPTCS style),
  • tool papers (max. 5 pages in EPTCS style),
All submissions must be original and unpublished. Regular and tool papers accepted for the presentation at the workshop will appear in Electronic Proceedings in Theoretical Computer Science series, hence, submissions must be prepared in LaTeX using the EPTCS macro package. Submission accepted for the presentation must be presented at the workshop conference by at least one of the co-authors.

Submission page at EasyChair conference system.

IMPORTANT DATES:

    Abstract submission: May 25, 2012
    Full paper submission: June 1, 2012
    Notification: July 9, 2012
    Updated workshop version: September 10, 2012
    Workshop: September 17, 2012
    Post-proceedings version:    October 19, 2012

PROGRAMME COMMITTEE:

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